The trend in the semiconductor industry is to increase the density of circuits formed on a semiconductor die of a given size, thereby increasing the circuit functions that can be performed on such die. Semiconductor circuits can be made smaller by the use of new photolithography equipment and techniques so that the line widths and features of circuit elements can be made smaller. However, such equipment is extremely expensive and can present a substantial capital expenditure. On the other hand, the circuit architecture can often be changed so that the same circuits can be fabricated in a smaller area of the semiconductor material. New circuit architecture techniques by which smaller-area circuits can be realized include trench methods for forming capacitors, and stacking components on top of each other on the semiconductor substrate. Ferroelectric capacitors utilized in semiconductor memories can be easily made smaller and yet accomplish the same capacitance as DRAM type MOS capacitors, in that the ferroelectric material has a substantially higher dielectric constant than other more conventional dielectrics such as silicon dioxide or tantalum pentoxide.
The miniaturization or scaling of ferroelectric circuits involves certain considerations and concerns that do not arise with other types of circuits. For example, special precautions and materials are required in the fabrication of ferroelectric circuits because of the high temperatures involved. The sintering step, in which the ferroelectric material is heated to temperatures upwardly of 600.degree.-800.degree. C. to form the polarizable ceramic material, is sufficiently high to adversely affect various other materials typically used in semiconductor memories. Because of the high temperatures involved during the sintering step, materials such as aluminum which melt or flow at such temperature, often must be deposited after the sintering step. Because of the necessity for providing circuit interconnects after the sintering step, various process inefficiencies arise. One inefficiency that arises is that the semiconductor area required generally increases to accommodate the post-sintering deposition of the metal interconnects. Another concern attendant with the fabrication of ferroelectric components is the adverse effect thereon of processes and materials that generate hydrogen. It is well known that when a reaction between hydrogen and ferroelectric material occurs, the result is the degradation of the ferroelectric material, sometimes to the extent that the ferroelectric material is not usable.
It is well known that refractory metals, such as tungsten, are ideally suited for use in forming interconnections and can withstand high temperatures up to over 1,000.degree. C. The tungsten material has been employed successfully with conventional semiconductor processing equipment in forming conductors and interconnections in conventional non-ferroelectric, semiconductor circuits. However, the chemical vapor deposition (CVD) technique for depositing tungsten is a hydrogen intensive process that is extremely degenerative to ferroelectric material. Accordingly, the use of tungsten in ferroelectric circuits has been discouraged as the materials are not complementary with respect to processing and results.
From the foregoing, it can be seen that a need exists for a technique in which tungsten or other refractory metals can be employed in the fabrication of semiconductor circuits, prior to the deposition and sintering of ferroelectric material, and thereby realize circuits of smaller area. Another need exists for a small area ferroelectric cell in which the ferroelectric capacitor is formed overlying an associated transistor, and the employment of processing techniques for utilizing a refractory metal to provide vertical interconnects between the ferroelectric capacitor plate and the underlying transistor. Another need exists for a technique for fabricating high density ferroelectric memory cells utilizing conventional semiconductor processing equipment and materials.